Linux中断子系统初始化全解析:从start_kernel到GIC-V3 IRQ Domain建立 【第11篇·共15篇】

#ifdef CONFIG_IRQCHIP    #define IRQCHIP_OF_MATCH_TABLE()                    \        . = ALIGN(8);                           \        VMLINUX_SYMBOL(__irqchip_begin) = .;                \        *(__irqchip_of_table)                       \        *(__irqchip_of_end)#endif

void __initof_irq_init(conststruct of_device_id *matches){    const struct of_device_id *match;    struct device_node *np, *parent = NULL;    struct of_intc_desc *desc, *temp_desc;    struct list_head intc_desc_list, intc_parent_list;    INIT_LIST_HEAD(&intc_desc_list);    INIT_LIST_HEAD(&intc_parent_list);    for_each_matching_node_and_match(np, matches, &match)    {    	if (!of_property_read_bool(np, "interrupt-controller") ||    			!of_device_is_available(np))    		continue;        ....    	desc->irq_init_cb = match->data;    	desc->dev = of_node_get(np);    	desc->interrupt_parent = of_irq_find_parent(np);        ....    }    ....    while (!list_empty(&intc_desc_list)) {        ret = desc->irq_init_cb(desc->dev,        			desc->interrupt_parent);        .....    }}

static int __initgic_init_bases(void __iomem *dist_base,				 struct redist_region *rdist_regs,				 u32 nr_redist_regions,				 u64 redist_stride,				 struct fwnode_handle *handle){	u32 typer;int err;if (!is_hyp_mode_available())		static_branch_disable(&supports_deactivate_key);if (static_branch_likely(&supports_deactivate_key))		pr_info("GIC: Using split EOI/Deactivate mode\n");	gic_data.fwnode = handle;	gic_data.dist_base = dist_base;	gic_data.redist_regions = rdist_regs;	gic_data.nr_redist_regions = nr_redist_regions;	gic_data.redist_stride = redist_stride;/* 确认支持 SPI 中断号最大的值为多少。*/	typer = readl_relaxed(gic_data.dist_base + GICD_TYPER);	gic_data.rdists.gicd_typer = typer;	gic_enable_quirks(readl_relaxed(gic_data.dist_base + GICD_IIDR),			  gic_quirks, &gic_data);	pr_info("%d SPIs implemented\n", GIC_LINE_NR - 32);	pr_info("%d Extended SPIs implemented\n", GIC_ESPI_NR);if (!(gic_data.flags & FLAGS_WORKAROUND_CAVIUM_ERRATUM_38539))		gic_data.rdists.gicd_typer2 = readl_relaxed(gic_data.dist_base + GICD_TYPER2);/* 向系统中注册一个 irq domain 的数据结构，irq_domain 主要作用是将硬件中断号映射到 irq number。*/	gic_data.domain = irq_domain_create_tree(handle, &gic_irq_domain_ops,						 &gic_data);	gic_data.rdists.rdist = alloc_percpu(typeof(*gic_data.rdists.rdist));	gic_data.rdists.has_rvpeid = true;	gic_data.rdists.has_vlpis = true;	gic_data.rdists.has_direct_lpi = true;	gic_data.rdists.has_vpend_valid_dirty = true;if (WARN_ON(!gic_data.domain) || WARN_ON(!gic_data.rdists.rdist)) {		err = -ENOMEM;goto out_free;	}	irq_domain_update_bus_token(gic_data.domain, DOMAIN_BUS_WIRED);	gic_data.has_rss = !!(typer & GICD_TYPER_RSS);	pr_info("Distributor has %sRange Selector support\n",		gic_data.has_rss ? "" : "no ");if (typer & GICD_TYPER_MBIS) {		err = mbi_init(handle, gic_data.domain);if (err)			pr_err("Failed to initialize MBIs\n");	}/* 设定 arch 相关的 irq handler。*/	set_handle_irq(gic_handle_irq);	gic_update_rdist_properties();/* 初始化 Distributor。*/	gic_dist_init();/* 初始化 CPU interface。*/	gic_cpu_init();/* 设置 SMP 核间交互的回调函数，用于 IPI，回调函数为 gic_raise_softirq。*/	gic_smp_init();/* 初始化 GIC 电源管理。*/	gic_cpu_pm_init();	gic_syscore_init();/* 初始化 ITS。*/if (gic_dist_supports_lpis()) {		its_init(handle, &gic_data.rdists, gic_data.domain);		its_cpu_init();	} else {if (IS_ENABLED(CONFIG_ARM_GIC_V2M))			gicv2m_init(handle, gic_data.domain);	}	gic_enable_nmi_support();return 0;out_free:if (gic_data.domain)		irq_domain_remove(gic_data.domain);	free_percpu(gic_data.rdists.rdist);return err;}

handler:  handle_fasteoi_irqdevice:   0000:00:02.0status:   0x00000000istate:   0x00000000ddepth:   0wdepth:   0dstate:   0x33400200            IRQD_ACTIVATED            IRQD_IRQ_STARTED            IRQD_SINGLE_TARGET            IRQD_AFFINITY_ON_ACTIVATE            IRQD_DEFAULT_TRIGGER_SET            IRQD_HANDLE_ENFORCE_IRQCTXnode:     -1affinity: 0-3effectiv: 0domain:  :intc@8000000:its@8080000-3 hwirq:   0x8000 chip:    ITS-MSI flags:   0x20          IRQCHIP_ONESHOT_SAFE parent:    domain:  :intc@8000000:its@8080000-5     hwirq:   0x2000     chip:    ITS     flags:   0x0     parent:        domain:  :intc@8000000-1         hwirq:   0x2000         chip:    GICv3         flags:   0x15                    IRQCHIP_SET_TYPE_MASKED                    IRQCHIP_MASK_ON_SUSPEND                    IRQCHIP_SKIP_SET_WAKE

gic_init_bases	|- its_init(handle, &gic_data.rdists, gic_data.domain);		|- its_of_probe(of_node);            |- its_probe_one(&res, &np->fwnode, of_node_to_nid(np));            	|- irq_domain_create_tree(handle, &its_domain_ops, its);staticintits_init_domain(struct fwnode_handle *handle, struct its_node *its){struct irq_domain *inner_domain;struct msi_domain_info *info;	info = kzalloc(sizeof(*info), GFP_KERNEL);if (!info)return -ENOMEM;	inner_domain = irq_domain_create_tree(handle, &its_domain_ops, its);if (!inner_domain) {		kfree(info);return -ENOMEM;	}	inner_domain->parent = its_parent;	irq_domain_update_bus_token(inner_domain, DOMAIN_BUS_NEXUS);	inner_domain->flags |= its->msi_domain_flags;	info->ops = &its_msi_domain_ops;	info->data = its;	inner_domain->host_data = info;return 0;}static const struct of_device_id its_device_id[] = {	{	.compatible	= "arm,gic-v3-its",	},	{},};static const struct irq_domain_ops its_domain_ops = {	.alloc			= its_irq_domain_alloc,	.free			= its_irq_domain_free,	.activate		= its_irq_domain_activate,	.deactivate		= its_irq_domain_deactivate,};